1. Field of the Invention
The present invention generally relates to memory systems. More particularly, the present invention relates to the field of avoiding exceeding an optimal maximal threshold of utilization of a portion of a computer system due to a write back operation.
2. Related Art
A cache, main memory, or other temporarily private data storage generally implements a particular write policy/strategy. The temporarily private data storage refers to any component of a computer system that temporarily maintains some particular data in a private state (i.e., some portion of the computer system can see the data while other portion of the computer system cannot see the data) but in the future wants to make available the particular data to other portion of the computer system. A scratch pad memory of a processor is an example of a temporarily private data storage.
Examples of write strategies include a write through strategy and a write back strategy. The simplest case is the write through strategy. In a write through cache, a write operation from the processor leads to the transfer of the data to the next level in the memory hierarchy, which may be the main memory, even with a cache hit. Moreover, an entry in the write through cache is written to and updated.
In a write back cache, on a write operation from the processor only the entry (on a cache hit) in the write back cache is written to and updated while the content of the main memory or other level of memory remains unaltered. The dirty (has been written to) entry of the write back cache is written back to main memory on a subsequent occasion to clean or flush the write back cache. Only after an explicit instruction to clean the write back cache or in certain cases of capacity, conflict, or coherence misses is the dirty or updated cache entry copied to the main memory or other level of memory to update the content there.
In a computer system, preemptive cleaning in the case of a write back cache, write back main memory, or other write back temporarily private data storage is achieved by allowing lines, pages, words, memory locations, or sets of memory locations within the cache or main memory to be written back to the next level of memory or non-volatile storage (e.g., disk, flash memory, battery backed-up DRAM, tape, etc.) prior to a synchronization operation, a checkpointing operation, a context switch, a page fault or page replacement, etc. Typically, but not necessarily, this would be done in the background, when all or some of the involved hardware is idle or not fully utilized.
Some conventional techniques wait until the synchronization operation, the checkpointing operation, the context switch, the page fault or page replacement, etc. is executed by a processor or processors to begin the process of cleaning or flushing the dirty lines or dirty pages in each processor's cache and/or in main memory and/or in other temporarily private data storage. This increases latency and stall time of instruction execution. Moreover, this causes a portion of the computer system to operate above an optimal maximal threshold of utilization. For example, the bus(es), the caches, the main memory, etc. can become saturated or operate at greater than optimal thresholds of utilization at the time of the synchronization operation, the checkpointing operation, the context switch, the page fault, etc., thereby leading to bottlenecks and excessive queueing of requested operations.
Conventional techniques use information stored on a per line, per word, or per page basis to determine which lines or pages or words to write back to the next level of memory or non-volatile storage (e.g., disk, flash memory, battery backed-up DRAM, tape, etc.). This complicates the task of determining which portions of the write back memory system require write backs at the time completion of such write backs becomes necessary.